void run()
{
  PC=0xf000;
  total_instructions=0;
  cycles=0;

  while(1)
  {

      total_instructions++;
      low_nibble=ram[PC]&0x0f;
      opcode=ram[PC];

      if (low_nibble==0x09)
      {
        if (opcode==0xa9) // LDA (Immediate)
        {

          A=ram[++PC];

          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0xb9) // LDA (Absolute, Y)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8)+Y;
          A=ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1)
          {
            if ((M&255)!=((M-Y)&255))
            { cycles=cycles+5; }
              else
            { cycles=cycles+4; }
          }
        }
          else
        if (opcode==0x99) // STA (Absolute, Y)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8)+Y;
          ram[M]=A;
          if (count_cycles==1) cycles=cycles+5;
        }
          else
        if (opcode==0xc9)  // CMP (Immediate)
        {

          temp=A-ram[++PC];
          if (temp<0)
          {
            temp=temp+256;
            C=1;
          }
            else
          { C=0; }

          Z=temp;
          N=temp&128;
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0xd9)  // CMP (Absolute, Y)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8)+Y;
          temp=A-ram[M];
          if (temp<0)
          {
            temp=temp+256;
            C=1;
          }
            else
          { C=0; }

          Z=temp;
          N=temp&128;
          if (count_cycles==1)
          {
            if ((M&255)!=((M-Y)&255))
            { cycles=cycles+5; }
              else
            { cycles=cycles+4; }
          }
        }
          else
        if (opcode==0x29) // AND (Immediate)
        {

          A=A&ram[++PC];

          Z=A;
          N=A&128;
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0x49) // EOR (Immediate)
        {

          A=A^ram[++PC];

          Z=A;
          N=A&128;
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0x09) // ORA (Immediate)
        {

          A=A|ram[++PC];

          Z=A;
          N=A&128;
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0x69) // ADC (Immediate)
        {

          A=A+ram[++PC]+C;
          if (A>255)
          {
            C=1;
            A=A-256;
          }
            else
          { C=0; }

          Z=A;
          N=A&128;
          V=(C^N);
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0xf9) // SBC (Absolute, Y)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8)+Y;
          A=A-ram[M]-(C^1);
          if (A<0)
          {
            C=1;
            A=A+256;
          }
            else
          { C=0; }

          Z=A;
          N=A&128;
          V=(C^N);
          if (count_cycles==1)
          {
            if ((M&255)!=((M-Y)&255))
            { cycles=cycles+5; }
              else
            { cycles=cycles+4; }
          }
        }
          else
        if (opcode==0x79) // ADC (Absolute, Y)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8)+Y;
          A=A+ram[M]+C;
          if (A>255)
          {
            C=1;
            A=A-256;
          }
            else
          { C=0; }

          Z=A;
          N=A&128;
          V=(C^N);
          if (count_cycles==1)
          {
            if ((M&255)!=((M-Y)&255))
            { cycles=cycles+5; }
              else
            { cycles=cycles+4; }
          } 
        }
          else
        if (opcode==0x39) // AND (Absolute, Y)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8)+Y;
          A=A&ram[M];

          Z=A;
          N=A&128;
          if (count_cycles==1)
          {
            if ((M&255)!=(M-Y))
            { cycles=cycles+5; }
              else
            { cycles=cycles+4; }
          }
        }
          else
        if (opcode==0x59) // EOR (Absolute, Y)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8)+Y;
          A=A^ram[M];

          Z=A;
          N=A&128;
          if (count_cycles==1)
          {
            if ((M&255)!=((M-Y)&255))
            { cycles=cycles+5; }
              else
            { cycles=cycles+4; }
          }
        }
          else
        if (opcode==0x19) // ORA (Absolute, Y)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8)+Y;
          A=A|ram[M];

          Z=A;
          N=A&128;
          if (count_cycles==1)
          {
            if ((M&255)!=((M-Y)&255))
            { cycles=cycles+5; }
              else
            { cycles=cycles+4; }
          }
        }
          else
        if (opcode==0x69) // AND (Immediate)
        {

          A=A&ram[++PC];

          Z=A;
          N=A&128;
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0x09) // ORA (Immediate)
        {

          A=A^ram[++PC];

          Z=A;
          N=A&128;
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0xe9) // SBC (Immediate)
        {

          A=A-ram[++PC]-(C^1);
          if (A<0)
          {
            C=1;
            A=A+256;
          }
            else
          { C=0; }

          Z=A;
          N=A&128;
          V=(C^N);
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        {
          illegal_instruction();
          break;
        }
      }
        else
      if (low_nibble==0x02)
      {
        if (opcode==0xa2) // LDX (Immediate)
        {

          X=ram[++PC];

          Z=X;
          N=X&128;
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        {
          illegal_instruction();
          break;
        }

      }
        else
      if (low_nibble==0x04)
      {
        if (opcode==0xa4) // LDY (Zero Page)
        {

          M=ram[++PC];
          Y=ram[M];

          Z=Y;
          N=Y&128;
          if (count_cycles==1) cycles=cycles+3;
        }
          else
        if (opcode==0xb4) // LDY (Zero Page, X)
        {

          M=ram[++PC]+X;
          Y=ram[M];

          Z=Y;
          N=Y&128;
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0x84) // STY (Zero Page)
        {

          M=ram[++PC];
          ram[M]=Y;
          if (count_cycles==1) cycles=cycles+3;
        }
          else
        if (opcode==0x94) // STY (Zero Page, X)
        {

          M=ram[++PC]+X;
          ram[M]=Y;
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0xe4)  // CPX (Zero Page)
        {

          M=ram[++PC];
          temp=X-ram[M];
          if (temp<0)
          {
            temp=temp+256;
            C=1;
          }
            else
          { C=0; }

          Z=temp;
          N=temp&128;
          if (count_cycles==1) cycles=cycles+3;
        }
          else
        if (opcode==0xc4)  // CPY (Zero Page)
        {

          M=ram[++PC];
          temp=Y-ram[M];
          if (temp<0)
          {
            temp=temp+256;
            C=1;
          }
            else
          { C=0; }

          Z=temp;
          N=temp&128;
          if (count_cycles==1) cycles=cycles+3;
        }
          else
        if (opcode==0x24) // BIT (Zero Page)
        {

          temp=(A&ram[++PC]);

          Z=temp;
          N=temp&128;
          V=temp&64;
          if (count_cycles==1) cycles=cycles+3;
        }
          else
        {
          illegal_instruction();
          break;
        }
      }
        else
      if (low_nibble==0x06)
      {
        if (opcode==0xa6) // LDX (Zero Page)
        {

          M=ram[++PC];
          X=ram[M];

          Z=X;
          N=X&128;
          if (count_cycles==1) cycles=cycles+3;
        }
          else
        if (opcode==0xb6) // LDX (Zero Page, Y)
        {

          M=ram[++PC]+Y;
          X=ram[M];

          Z=X;
          N=X&128;
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0x86) // STX (Zero Page)
        {

          M=ram[++PC];
          ram[M]=X;
          if (count_cycles==1) cycles=cycles+3;
        }
          else
        if (opcode==0x96) // STX (Zero Page, Y)
        {

          M=ram[++PC]+Y;
          ram[M]=X;
          if (count_cycles==1) cycles=cycles+3;
        }
          else
        if (opcode==0xe6) // INC (Zero Page)
        {

          M=ram[++PC];
          ram[M]++;
          if (ram[M]>255)
          { ram[M]=0; }

          Z=ram[M];
          N=ram[M]&128;
          if (count_cycles==1) cycles=cycles+5;
        }
          else
        if (opcode==0xf6) // INC (Zero Page, X)
        {

          M=ram[++PC]+X;
          ram[M]++;
          if (ram[M]>255)
          { ram[M]=0; }

          Z=ram[M];
          N=ram[M]&128;
          if (count_cycles==1) cycles=cycles+6;
        }
          else
        if (opcode==0xc6) // DEC (Zero Page)
        {

          M=ram[++PC];
          if (ram[M]==0)
          { ram[M]=255; }
            else
          { ram[M]--; }

          Z=ram[M];
          N=ram[M]&128;
          if (count_cycles==1) cycles=cycles+5;
        }
          else
        if (opcode==0xd6) // DEC (Zero Page, X)
        {

          M=ram[++PC]+X;
          if (ram[M]==0)
          { ram[M]=255; }
            else
          { ram[M]--; }

          Z=ram[M];
          N=ram[M]&128;
          if (count_cycles==1) cycles=cycles+6;
        }
          else
        if (opcode==0x06)  // ASL (Zero Page)
        {

          M=ram[++PC];
          C=((ram[M]&128)>>7);
          ram[M]=((ram[M]<<1)&255);

          Z=ram[M];
          N=ram[M]&128;
          if (count_cycles==1) cycles=cycles+5;
        }
          else
        if (opcode==0x46)  // LSR (Zero Page)
        {

          M=ram[++PC];
          C=(ram[M]&1);
          ram[M]=(ram[M]>>1);

          Z=ram[M];
          N=0;
          if (count_cycles==1) cycles=cycles+5;
        }
          else
        if (opcode==0x66)  // ROR (Zero Page)
        {

          M=++PC;
          temp=(ram[M]&1);
          ram[M]=((ram[M]>>1)+(C<<7));

          C=temp;
          Z=A;
          N=A&128;
          if (count_cycles==1) cycles=cycles+5;
        }
          else
        if (opcode==0x26)  // ROL (Zero Page)
        {

          M=++PC;
          temp=(ram[M]&128);
          ram[M]=((ram[M]<<1)+C);

          C=(temp>>7);
          Z=A;
          N=A&128;
          if (count_cycles==1) cycles=cycles+5;
        }
          else
        if (opcode==0x36)  // ROR (Zero Page, X)
        {

          M=(++PC)+X;
          temp=(ram[M]&1);
          ram[M]=((ram[M]>>1)+(C<<7));

          C=temp;
          Z=A;
          N=A&128;
          if (count_cycles==1) cycles=cycles+6;
        }
          else
        if (opcode==0x76)  // ROL (Zero Page, X)
        {

          M=(++PC)+X;
          temp=(ram[M]&128);
          ram[M]=((ram[M]<<1)+C);

          C=(temp>>7);
          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+6;
        }
          else
        if (opcode==0x16)  // ASL (Zero Page, X)
        {

          M=ram[++PC]+X;
          C=((ram[M]&128)>>7);
          ram[M]=((ram[M]<<1)&255);

          Z=ram[M];
          N=(ram[M]&128);
          if (count_cycles==1) cycles=cycles+6;
        }
          else
        if (opcode==0x56)  // LSR (Zero Page, X)
        {

          M=ram[++PC]+X;
          C=(ram[M]&1);
          ram[M]=(ram[M]>>1);

          Z=ram[M];
          N=0;
          if (count_cycles==1) cycles=cycles+6;
        }
          else
        {
          illegal_instruction();
          break;
        }
      }
        else
      if (low_nibble==0x05)
      {
        if (opcode==0xa5) // LDA (Zero Page)
        {

          M=ram[++PC];
          A=ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+3;
        }
          else
        if (opcode==0xb5) // LDA (Zero Page, X)
        {

          M=ram[++PC]+X;
          A=ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0x85) // STA (Zero Page)
        {

          M=ram[++PC];
          ram[M]=A;
          if (count_cycles==1) cycles=cycles+3;
        }
          else
        if (opcode==0x95) // STA (Zero Page, X)
        {

          M=ram[++PC]+X;
          ram[M]=A;
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0xc5)  // CMP (Zero Page)
        {

          M=ram[++PC];
          temp=A-ram[M];
          if (temp<0)
          {
            temp=temp+256;
            C=1;
          }
            else
          { C=0; }

          Z=temp;
          N=(temp&128);
          if (count_cycles==1) cycles=cycles+3;
        }
          else
        if (opcode==0xd5)  // CMP (Zero Page, X)
        {

          M=ram[++PC]+X;
          temp=A-ram[M];
          if (temp<0)
          {
            temp=temp+256;
            C=1;
          }
            else
          { C=0; }

          Z=temp;
          N=(temp&128);
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0x65) // ADC (ZeroPage)
        {

          M=ram[++PC];
          A=A+ram[M]+C;
          if (A>255)
          {
            C=1;
            A=A-256;
          }
            else
          { C=0; }

          Z=A;
          N=(A&128);
          V=(C^N);
          if (count_cycles==1) cycles=cycles+3;
        }
          else
        if (opcode==0x75) // ADC (ZeroPage, X)
        {

          M=ram[++PC]+X;
          A=A+ram[M]+C;
          if (A>255)
          {
            C=1;
            A=A-256;
          }
            else
          { C=0; }

          Z=A;
          N=(A&128);
          V=(C^N);
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0xe5) // SBC (Zero Page)
        {

          M=ram[++PC];
          A=A-ram[M]-(C^1);
          if (A<0)
          {
            C=1;
            A=A+256;
          }
            else
          { C=0; }

          Z=A;
          N=(A&128);
          V=(C^N);
          if (count_cycles==1) cycles=cycles+3;
        }
          else
        if (opcode==0xf5) // SBC (Zero Page, X)
        {

          M=ram[++PC]+X;
          A=A-ram[M]-(C^1);
          if (A<0)
          {
            C=1;
            A=A+256;
          }
            else
          { C=0; }

          Z=A;
          N=(A&128);
          V=(C^N);
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0x25) // AND (Zero Page)
        {

          M=ram[++PC];
          A=A&ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+3;
        }
          else
        if (opcode==0x45) // EOR (Zero Page)
        {

          M=ram[++PC];
          A=A^ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+3;
        }
          else
        if (opcode==0x05) // ORA (Zero Page)
        {

          M=ram[++PC];
          A=A|ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+3;
        }
          else
        if (opcode==0x35) // AND (Zero Page, X)
        {

          M=ram[++PC]+X;
          A=A&ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0x55) // EOR (Zero Page, X)
        {

          M=ram[++PC]+X;
          A=A^ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0x15) // ORA (Zero Page, X)
        {

          M=ram[++PC]+X;
          A=A|ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        {
          illegal_instruction();
          break;
        }
      }
        else
      if (low_nibble==0x00)
      {
        if (opcode==0xa0) // LDY (Immediate)
        {

          Y=ram[++PC];

          Z=Y;
          N=(Y&128);
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if ((opcode&0x10)==0x10)
        {
          branch=ram[PC+1];

          if (opcode==0xf0)  // BEQ
          {

            if (Z==0)
            {
              PC=PC+branch;
              if (count_cycles==1)
              {
                if ((PC&255)!=((PC-branch)&255))
                { cycles=cycles+3; }
                  else
                { cycles=cycles+2; }
              }
            }
              else
            if (count_cycles==1) cycles=cycles+2;
          }
            else
          if (opcode==0xd0)  // BNE
          {

            if (Z!=0)
            {
              PC=PC+branch;
              if (count_cycles==1)
              {
                if ((PC&255)!=((PC-branch)&255))
                { cycles=cycles+3; }
                  else
                { cycles=cycles+2; }
              }
            }
              else
            if (count_cycles==1) cycles=cycles+2;
          }
            else
          if (opcode==0xb0)  // BCS
          {

            if (C!=0)
            {
              PC=PC+branch;
              if (count_cycles==1)
              {
                if ((PC&255)!=((PC-branch)&255))
                { cycles=cycles+3; }
                  else
                { cycles=cycles+2; }
              }
            }
              else
            if (count_cycles==1) cycles=cycles+2;
          }
            else
          if (opcode==0x90)  // BCC
          {

            if (C==0)
            {
              PC=PC+branch;
              if (count_cycles==1)
              {
                if ((PC&255)!=((PC-branch)&255))
                { cycles=cycles+4; }
                  else
                { cycles=cycles+3; }
              }
            }
              else
            if (count_cycles==1) cycles=cycles+2;
          }
            else
          if (opcode==0x10)  // BPL
          {

            if (N==0)
            {
              PC=PC+branch;
              if (count_cycles==1)
              {
                if ((PC&255)!=((PC-branch)&255))
                { cycles=cycles+3; }
                  else
                { cycles=cycles+2; }
              }
            }
              else
            if (count_cycles==1) cycles=cycles+2;
          }
            else
          if (opcode==0x30)  // BMI
          {

            if (N!=0)
            {
              PC=PC+branch;
              if (count_cycles==1)
              {
                if ((PC&255)!=((PC-branch)&255))
                { cycles=cycles+3; }
                  else
                { cycles=cycles+2; }
              }
            }
              else
            if (count_cycles==1) cycles=cycles+2;
          }
            else
          if (opcode==0x50)  // BVC
          {

            if (V==0)
            {
              PC=PC+branch;
              if (count_cycles==1)
              {
                if ((PC&255)!=((PC-branch)&255))
                { cycles=cycles+3; }
                  else
                { cycles=cycles+2; }
              }
            }
              else
            if (count_cycles==1) cycles=cycles+2;
          }
            else
          if (opcode==0x70)  // BVS
          {

            if (V!=0)
            {
              PC=PC+branch;
              if (count_cycles==1)
              {
                if ((PC&255)!=((PC-branch)&255))
                { cycles=cycles+3; }
                  else
                { cycles=cycles+2; }
              }
            }
              else
            if (count_cycles==1) cycles=cycles+2;
          }
            else
          {
            illegal_instruction();
            break;
          }

          PC++;
        }
          else
        if (opcode==0xe0)  // CPX (Immediate)
        {

          temp=X-ram[++PC];
          if (temp<0)
          {
            temp=temp+256;
            C=1;
          }
            else
          { C=0; }

          Z=temp;
          N=(temp&128);
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0xc0)  // CPY (Immediate)
        {

          temp=Y-ram[++PC];
          if (temp<0)
          {
            temp=temp+256;
            C=1;
          }
            else
          { C=0; }

          Z=temp;
          N=(temp&128);
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0x20)  // JSR
        {

          ram[SP--]=(((PC+2)>>8)&(int)255);
          ram[SP--]=((PC+2)&(int)255);
          PC=(ram[PC+2]<<8)+ram[PC+1];
          if (count_cycles==1) cycles=cycles+6;
          continue;
        }
          else
        if (opcode==0x60)  // RTS
        {

          PC=ram[++SP];
          PC=PC+((ram[++SP])<<8);
          if (count_cycles==1) cycles=cycles+6;
        }
          else
        if (opcode==0x40)  // RTI
        {

          P=ram[++SP];
          unload_P();
          PC=ram[++SP];
          PC=PC+((ram[++SP])<<8);
          if (count_cycles==1) cycles=cycles+6;
        }
          else
        if (opcode==0x00)
        { 
          if (count_cycles==1) cycles=cycles+7;
          break;
        }
          else
        {
          illegal_instruction();
          break;
        }
      }
        else
      if (low_nibble==0x08)
      {
        if (opcode==0x88) // DEY (Implied)
        {

          Y--;
          if (Y<0) Y=255;

          Z=Y;
          N=(Y&128);
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0xc8) // INY (Implied)
        {

          Y++;
          if (Y>255) Y=0;

          Z=Y;
          N=(Y&128);
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0xe8) // INX (Implied)
        {

          X++;
          if (X>255) X=0;

          Z=X;
          N=(X&128);
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0x18) // CLC
        {
          C=0;
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0x38) // SEC
        {
          C=1;
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0x58) // CLI
        {
          I=0;
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0x78) // SEI
        {
          I=1;
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0xb8) // CLV
        {
          V=0;
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0xd8) // CLD
        {
          D=0;
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0xf8) // SED
        {
          D=1;
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0x48)  // PHA
        {

          ram[SP--]=A;
          if (count_cycles==1) cycles=cycles+3;
        }
          else
        if (opcode==0x08)  // PHP
        {

          load_P();
          ram[SP--]=P;
          if (count_cycles==1) cycles=cycles+3;
        }
          else
        if (opcode==0x68)  // PLA
        {

          A=ram[++SP];
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0x28)  // PLP
        {

          P=ram[++SP];
          unload_P();
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0x98)  // TYA
        {

          A=Y;

          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0xa8)  // TAY
        {

          Y=A;

          Z=Y;
          N=(Y&128);
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        {
          illegal_instruction();
          break;
        }

      }
        else
      if (low_nibble==0x0a)
      {
        if (opcode==0xca) // DEX
        {

          X--;
          if (X<0) X=255;

          Z=X;
          N=(X&128);
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0x4a)  // LSR (Accumulator)
        {

          C=(A&1);
          A=((A>>1)&255);

          Z=A;
          N=0;
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0x0a)  // ASL (Accumulator)
        {

          C=((A&128)>>7);
          A=((A<<1)&255);

          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0xaa)  // TAX
        {

          X=A;

          Z=X;
          N=(X&128);
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0xba)  // TSX
        {

          X=SP;

          Z=X;
          N=(X&128);
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0x8a)  // TXA
        {

          A=X;

          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0x9a)  // TXS
        {

          SP=X;
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0x6a)  // ROR (Accumulator)
        {

          temp=(A&1);
          A=(A>>1)+(C<<7);

          C=temp;
          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0x2a)  // ROL (Accumulator)
        {

          temp=(A&128);
          A=(A<<1)+C;

          C=(temp>>7);
          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        if (opcode==0xea)  // NOP
        {
          if (count_cycles==1) cycles=cycles+2;
        }
          else
        {
          illegal_instruction();
          break;
        }
      }
        else
      if (low_nibble==0x0c)
      {
        if (opcode==0x4c)  // JMP (Absolute)
        {

          PC=ram[PC+1]+(ram[PC+2]<<8);
          if (count_cycles==1) cycles=cycles+3;
          continue;
        }
          else
        if (opcode==0x6c)  // JMP (Indirect)
        {

          M=ram[PC+1]+(ram[PC+2]<<8);
          PC=ram[M]+(ram[M+1]<<8);
          if (count_cycles==1) cycles=cycles+5;
          continue;
        }
          else
        if (opcode==0xac) // LDY (Absolute)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8);
          Y=ram[M];

          Z=Y;
          N=(Y&128);
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0xbc) // LDY (Absolute, X)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8)+X;
          Y=ram[M];

          Z=Y;
          N=(Y&128);
          if (count_cycles==1)
          {
            if ((M&255)!=((M-X)&255))
            { cycles=cycles+5; }
              else
            { cycles=cycles+4; }
          }
        }
          else
        if (opcode==0x8c) // STY (Absolute)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8);
          ram[M]=Y;
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0xec)  // CPX (Absolute)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8);
          temp=X-ram[M];
          if (temp<0)
          {
            temp=temp+256;
            C=1;
          }
            else
          { C=0; }

          Z=temp;
          N=(temp&128);
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0xcc)  // CPY (Absolute)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8);
          temp=Y-ram[M];
          if (temp<0)
          {
            temp=temp+256;
            C=1;
          }
            else
          { C=0; }

          Z=temp;
          N=(temp&128);
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0x2c) // BIT (Absolute)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8);
          temp=(A&ram[M]);

          Z=temp;
          N=(temp&128);
          V=(temp&64);
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        {
          illegal_instruction();
          break;
        }
      }
        else
      if (low_nibble==0x0d)
      {
        if (opcode==0xad) // LDA (Absolute)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8);
          A=ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0xbd) // LDA (Absolute, X)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8)+X;
          A=ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1)
          {
            if ((M&255)!=((M-X)&255))
            { cycles=cycles+5; }
              else
            { cycles=cycles+4; }
          }
        }
          else
        if (opcode==0x8d) // STA (Absolute)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8);
          ram[M]=A;
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0x9d) // STA (Absolute, X)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8)+X;
          ram[M]=A;
          if (count_cycles==1) cycles=cycles+5;
        }
          else
        if (opcode==0xcd)  // CMP (Absolute)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8);
          temp=A-ram[M];
          if (temp<0)
          {
            temp=temp+256;
            C=1;
          }
            else
          { C=0; }

          Z=temp;
          N=(temp&128);
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0xdd)  // CMP (Absolute, X)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8)+X;
          temp=A-ram[M];
          if (temp<0)
          {
            temp=temp+256;
            C=1;
          }
            else
          { C=0; }

          Z=temp;
          N=(temp&128);
          if (count_cycles==1)
          {
            if ((M&255)!=((M-X)&255))
            { cycles=cycles+5; }
              else
            { cycles=cycles+4; }
          }
        }
          else
        if (opcode==0x6d) // ADC (Absolute)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8);
          A=A+ram[M]+C;
          if (A>255)
          {
            C=1;
            A=A-256;
          }
            else
          { C=0; }

          Z=A;
          N=(A&128);
          V=(C^N);
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0x7d) // ADC (Absolute, X)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8)+X;
          A=A+ram[M]+C;
          if (A>255)
          {
            C=1;
            A=A-256;
          }
            else
          { C=0; }

          Z=A;
          N=(A&128);
          V=(C^N);
          if (count_cycles==1)
          {
            if ((M&255)!=((M-X)&255))
            { cycles=cycles+5; }
              else
            { cycles=cycles+4; }
          }
        }
          else
        if (opcode==0xed) // SBC (Absolute)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8);
          A=A-ram[M]-(C^1);
          if (A<0)
          {
            C=1;
            A=A+256;
          }
            else
          { C=0; }

          Z=A;
          N=(A&128);
          V=(C^N);
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0xfd) // SBC (Absolute, X)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8)+X;
          A=A-ram[M]-(C^1);
          if (A<0)
          {
            C=1;
            A=A+256;
          }
            else
          { C=0; }

          Z=A;
          N=(A&128);
          V=(C^N);
          if (count_cycles==1)
          {
            if ((M&255)!=((M-X)&255))
            { cycles=cycles+5; }
              else
            { cycles=cycles+4; }
          }
        }
          else
        if (opcode==0x2d) // AND (Absolute)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8);
          A=A&ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0x4d) // EOR (Absolute)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8);
          A=A^ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0x0d) // ORA (Absolute)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8);
          A=A|ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0x3d) // AND (Absolute, X)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8)+X;
          A=A&ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1)
          {
            if ((M&255)!=((M-X)&255))
            { cycles=cycles+5; }
              else
            { cycles=cycles+4; }
          }
        }
          else
        if (opcode==0x5d) // EOR (Absolute, X)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8)+X;
          A=A^ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1)
          {
            if ((M&255)!=((M-X)&255))
            { cycles=cycles+5; }
              else
            { cycles=cycles+4; }
          }
        }
          else
        if (opcode==0x1d) // ORA (Absolute, X)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8)+X;
          A=A|ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1)
          {
            if ((M&255)!=((M-X)&255))
            { cycles=cycles+5; }
              else
            { cycles=cycles+4; }
          }
        }
          else
        {
          illegal_instruction();
          break;
        }
      }
        else
      if (low_nibble==0x01)
      {
        if (opcode==0xa1) // LDA ((Indirect, X))
        {

          M=ram[++PC]+X;
          M=ram[M]+(ram[M+1]<<8);
          A=ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+6;
        }
          else
        if (opcode==0xb1) // LDA ((Indirect), Y)
        {

          M=ram[++PC];
          M=ram[M]+(ram[M+1]<<8)+Y;
          A=ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1)
          {
            if ((M&255)!=((M-Y)&255))
            { cycles=cycles+6; }
              else
            { cycles=cycles+5; }
          }
        }
          else
        if (opcode==0x81) // STA ((Indirect, X))
        {

          M=ram[++PC]+X;
          M=ram[M]+(ram[M+1]<<8);
          ram[M]=A;
          if (count_cycles==1) cycles=cycles+6;
        }
          else
        if (opcode==0x91) // STA ((Indirect), Y)
        {

          M=ram[++PC];
          M=ram[M]+(ram[M+1]<<8)+Y;
          ram[M]=A;
          if (count_cycles==1) cycles=cycles+6;
        }
          else
        if (opcode==0xc1)  // CMP ((Indirect, X))
        {

          M=ram[++PC]+X;
          M=ram[M]+(ram[M+1]<<8);
          temp=A-ram[M];
          if (temp<0)
          {
            temp=temp+256;
            C=1;
          }
            else
          { C=0; }

          Z=temp;
          N=(temp&128);
          if (count_cycles==1) cycles=cycles+6;
        }
          else
        if (opcode==0xd1)  // CMP ((Indirect), Y)
        {

          M=ram[++PC];
          M=ram[M]+(ram[M+1]<<8)+Y;
          temp=A-ram[M];
          if (temp<0)
          {
            temp=temp+256;
            C=1;
          }
            else
          { C=0; }

          Z=temp;
          N=(temp&128);
          if (count_cycles==1)
          {
            if ((M&255)!=((M-Y)&255))
            { cycles=cycles+6; }
              else
            { cycles=cycles+5; }
          }
        }
          else
        if (opcode==0x61) // ADC ((Indirect, X))
        {

          M=ram[++PC]+X;
          M=ram[M]+(ram[M+1]<<8);
          A=A+ram[M]+C;
          if (A>255)
          {
            C=1;
            A=A-256;
          }
            else
          { C=0; }

          Z=A;
          N=(A&128);
          V=(C^N);
          if (count_cycles==1) cycles=cycles+6;
        }
          else
        if (opcode==0x71) // ADC ((Indirect, Y))
        {

          M=ram[++PC];
          M=ram[M]+(ram[M+1]<<8)+Y;
          A=A+ram[M]+C;
          if (A>255)
          {
            C=1;
            A=A-256;
          }
            else
          { C=0; }

          Z=A;
          N=(A&128);
          V=(C^N);
          if (count_cycles==1)
          {
            if ((M&255)!=((M-Y)&255))
            { cycles=cycles+6; }
              else
            { cycles=cycles+5; }
          }
        }
          else
        if (opcode==0xe1) // SBC ((Indirect, X))
        {

          M=ram[++PC]+X;
          M=ram[M]+(ram[M+1]<<8);
          A=A-ram[M]-(C^1);
          if (A<0)
          {
            C=1;
            A=A+256;
          }
            else
          { C=0; }

          Z=A;
          N=(A&128);
          V=(C^N);
          if (count_cycles==1) cycles=cycles+6;
        }
          else
        if (opcode==0xf1) // SBC ((Indirect), Y)
        {

          M=ram[++PC];
          M=ram[M]+(ram[M+1]<<8)+Y;
          A=A-ram[M]-(C^1);
          if (A<0)
          {
            C=1;
            A=A+256;
          }
            else
          { C=0; }

          Z=A;
          N=(A&128);
          V=(C^N);
          if (count_cycles==1)
          {
            if ((M&255)!=((M-Y)&255))
            { cycles=cycles+6; }
              else
            { cycles=cycles+5; }
          }
        }
          else
        if (opcode==0x21) // AND ((Indirect, X))
        {

          M=ram[++PC]+X;
          M=ram[M]+(ram[M+1]<<8);
          A=A&ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+6;
        }
          else
        if (opcode==0x41) // EOR ((Indirect, X))
        {

          M=ram[++PC]+X;
          M=ram[M]+(ram[M+1]<<8);
          A=A^ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+6;
        }
          else
        if (opcode==0x01) // ORA ((Indirect, X))
        {

          M=ram[++PC]+X;
          M=ram[M]+(ram[M+1]<<8);
          A=A|ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+6;
        }
          else
        if (opcode==0x31) // AND ((Indirect, Y))
        {

          M=ram[++PC];
          M=ram[M]+(ram[M+1]<<8)+Y;
          A=A&ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1)
          {
            if ((M&255)!=((M-Y)&255))
            { cycles=cycles+6; }
              else
            { cycles=cycles+5; }
          }
        }
          else
        if (opcode==0x51) // EOR ((Indirect, Y))
        {

          M=ram[++PC];
          M=ram[M]+(ram[M+1]<<8)+Y;
          A=A^ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1)
          {
            if ((M&255)!=((M-Y)&255))
            { cycles=cycles+6; }
              else
            { cycles=cycles+5; }
          }
        }
          else
        if (opcode==0x11) // ORA ((Indirect), Y)
        {

          M=ram[++PC];
          M=ram[M]+(ram[M+1]<<8)+Y;
          A=A|ram[M];

          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+5;
        }
          else
        {
          illegal_instruction();
          break;
        }
      }
        else
      if (low_nibble==0x0e)
      {
        if (opcode==0xae) // LDX (Absolute)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8);
          X=ram[M];

          Z=X;
          N=(X&128);
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0xbe) // LDX (Absolute, Y)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8)+Y;
          X=ram[M];

          Z=X;
          N=(X&128);
          if (count_cycles==1)
          {
            if ((M&255)!=((M-Y)&255))
            { cycles=cycles+5; }
              else
            { cycles=cycles+4; }
          }
        }
          else
        if (opcode==0xee) // INC (Absolute)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8);
          ram[M]++;
          if (ram[M]>255)
          { ram[M]=0; }

          Z=ram[M];
          N=(ram[M]&128);
          if (count_cycles==1) cycles=cycles+6;
        }
          else
        if (opcode==0xfe) // INC (Absolute, X)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8)+X;
          ram[M]++;
          if (ram[M]>255)
          { ram[M]=0; }

          Z=ram[M];
          N=(ram[M]&128);
          if (count_cycles==1) cycles=cycles+7;
        }
          else
        if (opcode==0xce) // DEC (Absolute)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8);
          if (ram[M]==0)
          { ram[M]=255; }
            else
          { ram[M]--; }

          Z=ram[M];
          N=(ram[M]&128);
          if (count_cycles==1) cycles=cycles+6;
        }
          else
        if (opcode==0xde) // DEC (Absolute, X)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8)+X;
          if (ram[M]==0)
          { ram[M]=255; }
            else
          { ram[M]--; }

          Z=ram[M];
          N=(ram[M]&128);
          if (count_cycles==1) cycles=cycles+7;
        }
          else
        if (opcode==0x8e) // STX (Absolute)
        {

          M=ram[++PC];
          M=M+(ram[++PC]<<8);
          ram[M]=X;
          if (count_cycles==1) cycles=cycles+4;
        }
          else
        if (opcode==0x0e)  // ASL (Absolute)
        {

          M=ram[++PC];
          M=(ram[++PC]<<8);
          C=((ram[M]&128)>>7);
          ram[M]=((ram[M]<<1)&255);

          Z=ram[M];
          N=(ram[M]&128);
          if (count_cycles==1) cycles=cycles+6;
        }
          else
        if (opcode==0x4e)  // LSR (Absolute)
        {

          M=ram[++PC];
          M=(ram[++PC]<<8);
          C=(ram[M]&1);
          ram[M]=(ram[M]>>1);

          Z=ram[M];
          N=0;
          if (count_cycles==1) cycles=cycles+6;
        }
          else
        if (opcode==0x1e)  // ASL (Absolute, X)
        {

          M=ram[++PC];
          M=(ram[++PC]<<8)+X;
          C=((ram[M]&128)>>7);
          ram[M]=((ram[M]<<1)&255);

          Z=ram[M];
          N=(ram[M]&128);
          if (count_cycles==1) cycles=cycles+7;
        }
          else
        if (opcode==0x5e)  // LSR (Absolute, X)
        {

          M=ram[++PC];
          M=(ram[++PC]<<8)+X;
          C=(ram[M]&1);
          ram[M]=(ram[M]>>1);

          Z=ram[M];
          N=0;
          if (count_cycles==1) cycles=cycles+7;
        }
          else
        if (opcode==0x2e)  // ROR (Absolute)
        {

          M=(++PC);
          M=M+((++PC)<<8);
          temp=(ram[M]&1);
          ram[M]=((ram[M]>>1)+(C<<7));

          C=temp;
          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+6;
        }
          else
        if (opcode==0x6e)  // ROL (Absolute)
        {

          M=(++PC);
          M=M+((++PC)<<8);
          temp=(ram[M]&128);
          ram[M]=((ram[M]<<1)+C);

          C=(temp>>7);
          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+6;
        }
          else
        if (opcode==0x3e)  // ROR (Absolute, X)
        {

          M=(++PC);
          M=M+((++PC)<<8)+X;
          temp=(ram[M]&1);
          ram[M]=((ram[M]>>1)+(C<<7));

          C=temp;
          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+7;
        }
          else
        if (opcode==0x7e)  // ROL (Absolute, X)
        {

          M=(++PC);
          M=M+((++PC)<<8)+X;
          temp=(ram[M]&128);
          ram[M]=((ram[M]<<1)+C);

          C=(temp>>7);
          Z=A;
          N=(A&128);
          if (count_cycles==1) cycles=cycles+7;
        }
          else
        {
          illegal_instruction();
          break;
        }
      }
        else
      {
        illegal_instruction();
        break;
      }

      PC++;
      if (count_cycles==1) cycles++;
  }

}