PUB run()
  PC := 0xf000
  total_instructions := 0
  cycles := 0
  repeat while 1
    total_instructions++
    low_nibble := ram[remap(PC)] & 0x0f
    opcode := ram[remap(PC)]
    if low_nibble==0x09
      if opcode==0xa9
        A := ram[remap(++PC)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0xb9
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8) + Y
        A := ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          if (M & 255)!=((M - Y) & 255)
            cycles := cycles + 5
          else
            cycles := cycles + 4
      elseif opcode==0x99
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8) + Y
        ram[remap(M)] := A
        if count_cycles==1
          cycles := cycles + 5
      elseif opcode==0xc9
        temp := A - ram[remap(++PC)]
        if temp<0
          temp := temp + 256
          C := 1
        else
          C := 0
        Z := temp
        N := temp & 128
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0xd9
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8) + Y
        temp := A - ram[remap(M)]
        if temp<0
          temp := temp + 256
          C := 1
        else
          C := 0
        Z := temp
        N := temp & 128
        if count_cycles==1
          if (M & 255)!=((M - Y) & 255)
            cycles := cycles + 5
          else
            cycles := cycles + 4
      elseif opcode==0x29
        A := A & ram[remap(++PC)]
        Z := A
        N := A & 128
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0x49
        A := A^ram[remap(++PC)]
        Z := A
        N := A & 128
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0x09
        A := A | ram[remap(++PC)]
        Z := A
        N := A & 128
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0x69
        A := A + ram[remap(++PC)] + C
        if A>255
          C := 1
          A := A - 256
        else
          C := 0
        Z := A
        N := A & 128
        V := (C^N)
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0xf9
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8) + Y
        A := A - ram[remap(M)] - (C^1)
        if A<0
          C := 1
          A := A + 256
        else
          C := 0
        Z := A
        N := A & 128
        V := (C^N)
        if count_cycles==1
          if (M & 255)!=((M - Y) & 255)
            cycles := cycles + 5
          else
            cycles := cycles + 4
      elseif opcode==0x79
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8) + Y
        A := A + ram[remap(M)] + C
        if A>255
          C := 1
          A := A - 256
        else
          C := 0
        Z := A
        N := A & 128
        V := (C^N)
        if count_cycles==1
          if (M & 255)!=((M - Y) & 255)
            cycles := cycles + 5
          else
            cycles := cycles + 4
      elseif opcode==0x39
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8) + Y
        A := A & ram[remap(M)]
        Z := A
        N := A & 128
        if count_cycles==1
          if (M & 255)!=(M - Y)
            cycles := cycles + 5
          else
            cycles := cycles + 4
      elseif opcode==0x59
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8) + Y
        A := A^ram[remap(M)]
        Z := A
        N := A & 128
        if count_cycles==1
          if (M & 255)!=((M - Y) & 255)
            cycles := cycles + 5
          else
            cycles := cycles + 4
      elseif opcode==0x19
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8) + Y
        A := A | ram[remap(M)]
        Z := A
        N := A & 128
        if count_cycles==1
          if (M & 255)!=((M - Y) & 255)
            cycles := cycles + 5
          else
            cycles := cycles + 4
      elseif opcode==0x69
        A := A & ram[remap(++PC)]
        Z := A
        N := A & 128
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0x09
        A := A^ram[remap(++PC)]
        Z := A
        N := A & 128
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0xe9
        A := A - ram[remap(++PC)] - (C^1)
        if A<0
          C := 1
          A := A + 256
        else
          C := 0
        Z := A
        N := A & 128
        V := (C^N)
        if count_cycles==1
          cycles := cycles + 2
      else
        illegal_instruction()
        break
    elseif low_nibble==0x02
      if opcode==0xa2
        X := ram[remap(++PC)]
        Z := X
        N := X & 128
        if count_cycles==1
          cycles := cycles + 2
      else
        illegal_instruction()
        break
    elseif low_nibble==0x04
      if opcode==0xa4
        M := ram[remap(++PC)]
        Y := ram[remap(M)]
        Z := Y
        N := Y & 128
        if count_cycles==1
          cycles := cycles + 3
      elseif opcode==0xb4
        M := ram[remap(++PC)] + X
        Y := ram[remap(M)]
        Z := Y
        N := Y & 128
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0x84
        M := ram[remap(++PC)]
        ram[remap(M)] := Y
        if count_cycles==1
          cycles := cycles + 3
      elseif opcode==0x94
        M := ram[remap(++PC)] + X
        ram[remap(M)] := Y
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0xe4
        M := ram[remap(++PC)]
        temp := X - ram[remap(M)]
        if temp<0
          temp := temp + 256
          C := 1
        else
          C := 0
        Z := temp
        N := temp & 128
        if count_cycles==1
          cycles := cycles + 3
      elseif opcode==0xc4
        M := ram[remap(++PC)]
        temp := Y - ram[remap(M)]
        if temp<0
          temp := temp + 256
          C := 1
        else
          C := 0
        Z := temp
        N := temp & 128
        if count_cycles==1
          cycles := cycles + 3
      elseif opcode==0x24
        temp := (A & ram[remap(++PC)])
        Z := temp
        N := temp & 128
        V := temp & 64
        if count_cycles==1
          cycles := cycles + 3
      else
        illegal_instruction()
        break
    elseif low_nibble==0x06
      if opcode==0xa6
        M := ram[remap(++PC)]
        X := ram[remap(M)]
        Z := X
        N := X & 128
        if count_cycles==1
          cycles := cycles + 3
      elseif opcode==0xb6
        M := ram[remap(++PC)] + Y
        X := ram[remap(M)]
        Z := X
        N := X & 128
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0x86
        M := ram[remap(++PC)]
        ram[remap(M)] := X
        if count_cycles==1
          cycles := cycles + 3
      elseif opcode==0x96
        M := ram[remap(++PC)] + Y
        ram[remap(M)] := X
        if count_cycles==1
          cycles := cycles + 3
      elseif opcode==0xe6
        M := ram[remap(++PC)]
        ram[remap(M)]++
        if ram[remap(M)]>255
          ram[remap(M)] := 0
        Z := ram[remap(M)]
        N := ram[remap(M)] & 128
        if count_cycles==1
          cycles := cycles + 5
      elseif opcode==0xf6
        M := ram[remap(++PC)] + X
        ram[remap(M)]++
        if ram[remap(M)]>255
          ram[remap(M)] := 0
        Z := ram[remap(M)]
        N := ram[remap(M)] & 128
        if count_cycles==1
          cycles := cycles + 6
      elseif opcode==0xc6
        M := ram[remap(++PC)]
        if ram[remap(M)]==0
          ram[remap(M)] := 255
        else
          ram[remap(M)]--
        Z := ram[remap(M)]
        N := ram[remap(M)] & 128
        if count_cycles==1
          cycles := cycles + 5
      elseif opcode==0xd6
        M := ram[remap(++PC)] + X
        if ram[remap(M)]==0
          ram[remap(M)] := 255
        else
          ram[remap(M)]--
        Z := ram[remap(M)]
        N := ram[remap(M)] & 128
        if count_cycles==1
          cycles := cycles + 6
      elseif opcode==0x06
        M := ram[remap(++PC)]
        C := ((ram[remap(M)] & 128)>>7)
        ram[remap(M)] := ((ram[remap(M)]<<1) & 255)
        Z := ram[remap(M)]
        N := ram[remap(M)] & 128
        if count_cycles==1
          cycles := cycles + 5
      elseif opcode==0x46
        M := ram[remap(++PC)]
        C := (ram[remap(M)] & 1)
        ram[remap(M)] := (ram[remap(M)]>>1)
        Z := ram[remap(M)]
        N := 0
        if count_cycles==1
          cycles := cycles + 5
      elseif opcode==0x66
        M := ++PC
        temp := (ram[remap(M)] & 1)
        ram[remap(M)] := ((ram[remap(M)]>>1) + (C<<7))
        C := temp
        Z := A
        N := A & 128
        if count_cycles==1
          cycles := cycles + 5
      elseif opcode==0x26
        M := ++PC
        temp := (ram[remap(M)] & 128)
        ram[remap(M)] := ((ram[remap(M)]<<1) + C)
        C := (temp>>7)
        Z := A
        N := A & 128
        if count_cycles==1
          cycles := cycles + 5
      elseif opcode==0x36
        M := (++PC) + X
        temp := (ram[remap(M)] & 1)
        ram[remap(M)] := ((ram[remap(M)]>>1) + (C<<7))
        C := temp
        Z := A
        N := A & 128
        if count_cycles==1
          cycles := cycles + 6
      elseif opcode==0x76
        M := (++PC) + X
        temp := (ram[remap(M)] & 128)
        ram[remap(M)] := ((ram[remap(M)]<<1) + C)
        C := (temp>>7)
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 6
      elseif opcode==0x16
        M := ram[remap(++PC)] + X
        C := ((ram[remap(M)] & 128)>>7)
        ram[remap(M)] := ((ram[remap(M)]<<1) & 255)
        Z := ram[remap(M)]
        N := (ram[remap(M)] & 128)
        if count_cycles==1
          cycles := cycles + 6
      elseif opcode==0x56
        M := ram[remap(++PC)] + X
        C := (ram[remap(M)] & 1)
        ram[remap(M)] := (ram[remap(M)]>>1)
        Z := ram[remap(M)]
        N := 0
        if count_cycles==1
          cycles := cycles + 6
      else
        illegal_instruction()
        break
    elseif low_nibble==0x05
      if opcode==0xa5
        M := ram[remap(++PC)]
        A := ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 3
      elseif opcode==0xb5
        M := ram[remap(++PC)] + X
        A := ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0x85
        M := ram[remap(++PC)]
        ram[remap(M)] := A
        if count_cycles==1
          cycles := cycles + 3
      elseif opcode==0x95
        M := ram[remap(++PC)] + X
        ram[remap(M)] := A
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0xc5
        M := ram[remap(++PC)]
        temp := A - ram[remap(M)]
        if temp<0
          temp := temp + 256
          C := 1
        else
          C := 0
        Z := temp
        N := (temp & 128)
        if count_cycles==1
          cycles := cycles + 3
      elseif opcode==0xd5
        M := ram[remap(++PC)] + X
        temp := A - ram[remap(M)]
        if temp<0
          temp := temp + 256
          C := 1
        else
          C := 0
        Z := temp
        N := (temp & 128)
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0x65
        M := ram[remap(++PC)]
        A := A + ram[remap(M)] + C
        if A>255
          C := 1
          A := A - 256
        else
          C := 0
        Z := A
        N := (A & 128)
        V := (C^N)
        if count_cycles==1
          cycles := cycles + 3
      elseif opcode==0x75
        M := ram[remap(++PC)] + X
        A := A + ram[remap(M)] + C
        if A>255
          C := 1
          A := A - 256
        else
          C := 0
        Z := A
        N := (A & 128)
        V := (C^N)
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0xe5
        M := ram[remap(++PC)]
        A := A - ram[remap(M)] - (C^1)
        if A<0
          C := 1
          A := A + 256
        else
          C := 0
        Z := A
        N := (A & 128)
        V := (C^N)
        if count_cycles==1
          cycles := cycles + 3
      elseif opcode==0xf5
        M := ram[remap(++PC)] + X
        A := A - ram[remap(M)] - (C^1)
        if A<0
          C := 1
          A := A + 256
        else
          C := 0
        Z := A
        N := (A & 128)
        V := (C^N)
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0x25
        M := ram[remap(++PC)]
        A := A & ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 3
      elseif opcode==0x45
        M := ram[remap(++PC)]
        A := A^ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 3
      elseif opcode==0x05
        M := ram[remap(++PC)]
        A := A | ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 3
      elseif opcode==0x35
        M := ram[remap(++PC)] + X
        A := A & ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0x55
        M := ram[remap(++PC)] + X
        A := A^ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0x15
        M := ram[remap(++PC)] + X
        A := A | ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 4
      else
        illegal_instruction()
        break
    elseif low_nibble==0x00
      if opcode==0xa0
        Y := ram[remap(++PC)]
        Z := Y
        N := (Y & 128)
        if count_cycles==1
          cycles := cycles + 2
      elseif (opcode & 0x10)==0x10
        branch := ram[remap(PC + 1)]
        if opcode==0xf0
          if Z==0
            PC := PC + branch
            if count_cycles==1
              if (PC & 255)!=((PC - branch) & 255)
                cycles := cycles + 3
              else
                cycles := cycles + 2
          elseif count_cycles==1
            cycles := cycles + 2
        elseif opcode==0xd0
          if Z!=0
            PC := PC + branch
            if count_cycles==1
              if (PC & 255)!=((PC - branch) & 255)
                cycles := cycles + 3
              else
                cycles := cycles + 2
          elseif count_cycles==1
            cycles := cycles + 2
        elseif opcode==0xb0
          if C!=0
            PC := PC + branch
            if count_cycles==1
              if (PC & 255)!=((PC - branch) & 255)
                cycles := cycles + 3
              else
                cycles := cycles + 2
          elseif count_cycles==1
            cycles := cycles + 2
        elseif opcode==0x90
          if C==0
            PC := PC + branch
            if count_cycles==1
              if (PC & 255)!=((PC - branch) & 255)
                cycles := cycles + 4
              else
                cycles := cycles + 3
          elseif count_cycles==1
            cycles := cycles + 2
        elseif opcode==0x10
          if N==0
            PC := PC + branch
            if count_cycles==1
              if (PC & 255)!=((PC - branch) & 255)
                cycles := cycles + 3
              else
                cycles := cycles + 2
          elseif count_cycles==1
            cycles := cycles + 2
        elseif opcode==0x30
          if N!=0
            PC := PC + branch
            if count_cycles==1
              if (PC & 255)!=((PC - branch) & 255)
                cycles := cycles + 3
              else
                cycles := cycles + 2
          elseif count_cycles==1
            cycles := cycles + 2
        elseif opcode==0x50
          if V==0
            PC := PC + branch
            if count_cycles==1
              if (PC & 255)!=((PC - branch) & 255)
                cycles := cycles + 3
              else
                cycles := cycles + 2
          elseif count_cycles==1
            cycles := cycles + 2
        elseif opcode==0x70
          if V!=0
            PC := PC + branch
            if count_cycles==1
              if (PC & 255)!=((PC - branch) & 255)
                cycles := cycles + 3
              else
                cycles := cycles + 2
          elseif count_cycles==1
            cycles := cycles + 2
        else
          illegal_instruction()
          break
        PC++
      elseif opcode==0xe0
        temp := X - ram[remap(++PC)]
        if temp<0
          temp := temp + 256
          C := 1
        else
          C := 0
        Z := temp
        N := (temp & 128)
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0xc0
        temp := Y - ram[remap(++PC)]
        if temp<0
          temp := temp + 256
          C := 1
        else
          C := 0
        Z := temp
        N := (temp & 128)
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0x20
        ram[remap(SP--)] := (((PC + 2)>>8) & (int)255)
        ram[remap(SP--)] := ((PC + 2) & (int)255)
        PC := (ram[remap(PC + 2)]<<8) + ram[remap(PC + 1)]
        if count_cycles==1
          cycles := cycles + 6
        continue
      elseif opcode==0x60
        PC := ram[remap(++SP)]
        PC := PC + ((ram[remap(++SP)])<<8)
        if count_cycles==1
          cycles := cycles + 6
      elseif opcode==0x40
        P := ram[remap(++SP)]
        unload_P()
        PC := ram[remap(++SP)]
        PC := PC + ((ram[remap(++SP)])<<8)
        if count_cycles==1
          cycles := cycles + 6
      elseif opcode==0x00
        if count_cycles==1
          cycles := cycles + 7
        break
      else
        illegal_instruction()
        break
    elseif low_nibble==0x08
      if opcode==0x88
        Y--
        if Y<0
          Y := 255
        Z := Y
        N := (Y & 128)
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0xc8
        Y++
        if Y>255
          Y := 0
        Z := Y
        N := (Y & 128)
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0xe8
        X++
        if X>255
          X := 0
        Z := X
        N := (X & 128)
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0x18
        C := 0
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0x38
        C := 1
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0x58
        I := 0
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0x78
        I := 1
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0xb8
        V := 0
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0xd8
        D := 0
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0xf8
        D := 1
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0x48
        ram[remap(SP--)] := A
        if count_cycles==1
          cycles := cycles + 3
      elseif opcode==0x08
        load_P()
        ram[remap(SP--)] := P
        if count_cycles==1
          cycles := cycles + 3
      elseif opcode==0x68
        A := ram[remap(++SP)]
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0x28
        P := ram[remap(++SP)]
        unload_P()
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0x98
        A := Y
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0xa8
        Y := A
        Z := Y
        N := (Y & 128)
        if count_cycles==1
          cycles := cycles + 2
      else
        illegal_instruction()
        break
    elseif low_nibble==0x0a
      if opcode==0xca
        X--
        if X<0
          X := 255
        Z := X
        N := (X & 128)
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0x4a
        C := (A & 1)
        A := ((A>>1) & 255)
        Z := A
        N := 0
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0x0a
        C := ((A & 128)>>7)
        A := ((A<<1) & 255)
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0xaa
        X := A
        Z := X
        N := (X & 128)
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0xba
        X := SP
        Z := X
        N := (X & 128)
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0x8a
        A := X
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0x9a
        SP := X
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0x6a
        temp := (A & 1)
        A := (A>>1) + (C<<7)
        C := temp
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0x2a
        temp := (A & 128)
        A := (A<<1) + C
        C := (temp>>7)
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 2
      elseif opcode==0xea
        if count_cycles==1
          cycles := cycles + 2
      else
        illegal_instruction()
        break
    elseif low_nibble==0x0c
      if opcode==0x4c
        PC := ram[remap(PC + 1)] + (ram[remap(PC + 2)]<<8)
        if count_cycles==1
          cycles := cycles + 3
        continue
      elseif opcode==0x6c
        M := ram[remap(PC + 1)] + (ram[remap(PC + 2)]<<8)
        PC := ram[remap(M)] + (ram[remap(M + 1)]<<8)
        if count_cycles==1
          cycles := cycles + 5
        continue
      elseif opcode==0xac
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8)
        Y := ram[remap(M)]
        Z := Y
        N := (Y & 128)
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0xbc
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8) + X
        Y := ram[remap(M)]
        Z := Y
        N := (Y & 128)
        if count_cycles==1
          if (M & 255)!=((M - X) & 255)
            cycles := cycles + 5
          else
            cycles := cycles + 4
      elseif opcode==0x8c
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8)
        ram[remap(M)] := Y
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0xec
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8)
        temp := X - ram[remap(M)]
        if temp<0
          temp := temp + 256
          C := 1
        else
          C := 0
        Z := temp
        N := (temp & 128)
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0xcc
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8)
        temp := Y - ram[remap(M)]
        if temp<0
          temp := temp + 256
          C := 1
        else
          C := 0
        Z := temp
        N := (temp & 128)
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0x2c
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8)
        temp := (A & ram[remap(M)])
        Z := temp
        N := (temp & 128)
        V := (temp & 64)
        if count_cycles==1
          cycles := cycles + 4
      else
        illegal_instruction()
        break
    elseif low_nibble==0x0d
      if opcode==0xad
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8)
        A := ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0xbd
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8) + X
        A := ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          if (M & 255)!=((M - X) & 255)
            cycles := cycles + 5
          else
            cycles := cycles + 4
      elseif opcode==0x8d
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8)
        ram[remap(M)] := A
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0x9d
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8) + X
        ram[remap(M)] := A
        if count_cycles==1
          cycles := cycles + 5
      elseif opcode==0xcd
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8)
        temp := A - ram[remap(M)]
        if temp<0
          temp := temp + 256
          C := 1
        else
          C := 0
        Z := temp
        N := (temp & 128)
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0xdd
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8) + X
        temp := A - ram[remap(M)]
        if temp<0
          temp := temp + 256
          C := 1
        else
          C := 0
        Z := temp
        N := (temp & 128)
        if count_cycles==1
          if (M & 255)!=((M - X) & 255)
            cycles := cycles + 5
          else
            cycles := cycles + 4
      elseif opcode==0x6d
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8)
        A := A + ram[remap(M)] + C
        if A>255
          C := 1
          A := A - 256
        else
          C := 0
        Z := A
        N := (A & 128)
        V := (C^N)
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0x7d
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8) + X
        A := A + ram[remap(M)] + C
        if A>255
          C := 1
          A := A - 256
        else
          C := 0
        Z := A
        N := (A & 128)
        V := (C^N)
        if count_cycles==1
          if (M & 255)!=((M - X) & 255)
            cycles := cycles + 5
          else
            cycles := cycles + 4
      elseif opcode==0xed
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8)
        A := A - ram[remap(M)] - (C^1)
        if A<0
          C := 1
          A := A + 256
        else
          C := 0
        Z := A
        N := (A & 128)
        V := (C^N)
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0xfd
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8) + X
        A := A - ram[remap(M)] - (C^1)
        if A<0
          C := 1
          A := A + 256
        else
          C := 0
        Z := A
        N := (A & 128)
        V := (C^N)
        if count_cycles==1
          if (M & 255)!=((M - X) & 255)
            cycles := cycles + 5
          else
            cycles := cycles + 4
      elseif opcode==0x2d
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8)
        A := A & ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0x4d
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8)
        A := A^ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0x0d
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8)
        A := A | ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0x3d
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8) + X
        A := A & ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          if (M & 255)!=((M - X) & 255)
            cycles := cycles + 5
          else
            cycles := cycles + 4
      elseif opcode==0x5d
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8) + X
        A := A^ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          if (M & 255)!=((M - X) & 255)
            cycles := cycles + 5
          else
            cycles := cycles + 4
      elseif opcode==0x1d
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8) + X
        A := A | ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          if (M & 255)!=((M - X) & 255)
            cycles := cycles + 5
          else
            cycles := cycles + 4
      else
        illegal_instruction()
        break
    elseif low_nibble==0x01
      if opcode==0xa1
        M := ram[remap(++PC)] + X
        M := ram[remap(M)] + (ram[remap(M + 1)]<<8)
        A := ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 6
      elseif opcode==0xb1
        M := ram[remap(++PC)]
        M := ram[remap(M)] + (ram[remap(M + 1)]<<8) + Y
        A := ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          if (M & 255)!=((M - Y) & 255)
            cycles := cycles + 6
          else
            cycles := cycles + 5
      elseif opcode==0x81
        M := ram[remap(++PC)] + X
        M := ram[remap(M)] + (ram[remap(M + 1)]<<8)
        ram[remap(M)] := A
        if count_cycles==1
          cycles := cycles + 6
      elseif opcode==0x91
        M := ram[remap(++PC)]
        M := ram[remap(M)] + (ram[remap(M + 1)]<<8) + Y
        ram[remap(M)] := A
        if count_cycles==1
          cycles := cycles + 6
      elseif opcode==0xc1
        M := ram[remap(++PC)] + X
        M := ram[remap(M)] + (ram[remap(M + 1)]<<8)
        temp := A - ram[remap(M)]
        if temp<0
          temp := temp + 256
          C := 1
        else
          C := 0
        Z := temp
        N := (temp & 128)
        if count_cycles==1
          cycles := cycles + 6
      elseif opcode==0xd1
        M := ram[remap(++PC)]
        M := ram[remap(M)] + (ram[remap(M + 1)]<<8) + Y
        temp := A - ram[remap(M)]
        if temp<0
          temp := temp + 256
          C := 1
        else
          C := 0
        Z := temp
        N := (temp & 128)
        if count_cycles==1
          if (M & 255)!=((M - Y) & 255)
            cycles := cycles + 6
          else
            cycles := cycles + 5
      elseif opcode==0x61
        M := ram[remap(++PC)] + X
        M := ram[remap(M)] + (ram[remap(M + 1)]<<8)
        A := A + ram[remap(M)] + C
        if A>255
          C := 1
          A := A - 256
        else
          C := 0
        Z := A
        N := (A & 128)
        V := (C^N)
        if count_cycles==1
          cycles := cycles + 6
      elseif opcode==0x71
        M := ram[remap(++PC)]
        M := ram[remap(M)] + (ram[remap(M + 1)]<<8) + Y
        A := A + ram[remap(M)] + C
        if A>255
          C := 1
          A := A - 256
        else
          C := 0
        Z := A
        N := (A & 128)
        V := (C^N)
        if count_cycles==1
          if (M & 255)!=((M - Y) & 255)
            cycles := cycles + 6
          else
            cycles := cycles + 5
      elseif opcode==0xe1
        M := ram[remap(++PC)] + X
        M := ram[remap(M)] + (ram[remap(M + 1)]<<8)
        A := A - ram[remap(M)] - (C^1)
        if A<0
          C := 1
          A := A + 256
        else
          C := 0
        Z := A
        N := (A & 128)
        V := (C^N)
        if count_cycles==1
          cycles := cycles + 6
      elseif opcode==0xf1
        M := ram[remap(++PC)]
        M := ram[remap(M)] + (ram[remap(M + 1)]<<8) + Y
        A := A - ram[remap(M)] - (C^1)
        if A<0
          C := 1
          A := A + 256
        else
          C := 0
        Z := A
        N := (A & 128)
        V := (C^N)
        if count_cycles==1
          if (M & 255)!=((M - Y) & 255)
            cycles := cycles + 6
          else
            cycles := cycles + 5
      elseif opcode==0x21
        M := ram[remap(++PC)] + X
        M := ram[remap(M)] + (ram[remap(M + 1)]<<8)
        A := A & ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 6
      elseif opcode==0x41
        M := ram[remap(++PC)] + X
        M := ram[remap(M)] + (ram[remap(M + 1)]<<8)
        A := A^ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 6
      elseif opcode==0x01
        M := ram[remap(++PC)] + X
        M := ram[remap(M)] + (ram[remap(M + 1)]<<8)
        A := A | ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 6
      elseif opcode==0x31
        M := ram[remap(++PC)]
        M := ram[remap(M)] + (ram[remap(M + 1)]<<8) + Y
        A := A & ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          if (M & 255)!=((M - Y) & 255)
            cycles := cycles + 6
          else
            cycles := cycles + 5
      elseif opcode==0x51
        M := ram[remap(++PC)]
        M := ram[remap(M)] + (ram[remap(M + 1)]<<8) + Y
        A := A^ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          if (M & 255)!=((M - Y) & 255)
            cycles := cycles + 6
          else
            cycles := cycles + 5
      elseif opcode==0x11
        M := ram[remap(++PC)]
        M := ram[remap(M)] + (ram[remap(M + 1)]<<8) + Y
        A := A | ram[remap(M)]
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 5
      else
        illegal_instruction()
        break
    elseif low_nibble==0x0e
      if opcode==0xae
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8)
        X := ram[remap(M)]
        Z := X
        N := (X & 128)
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0xbe
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8) + Y
        X := ram[remap(M)]
        Z := X
        N := (X & 128)
        if count_cycles==1
          if (M & 255)!=((M - Y) & 255)
            cycles := cycles + 5
          else
            cycles := cycles + 4
      elseif opcode==0xee
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8)
        ram[remap(M)]++
        if ram[remap(M)]>255
          ram[remap(M)] := 0
        Z := ram[remap(M)]
        N := (ram[remap(M)] & 128)
        if count_cycles==1
          cycles := cycles + 6
      elseif opcode==0xfe
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8) + X
        ram[remap(M)]++
        if ram[remap(M)]>255
          ram[remap(M)] := 0
        Z := ram[remap(M)]
        N := (ram[remap(M)] & 128)
        if count_cycles==1
          cycles := cycles + 7
      elseif opcode==0xce
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8)
        if ram[remap(M)]==0
          ram[remap(M)] := 255
        else
          ram[remap(M)]--
        Z := ram[remap(M)]
        N := (ram[remap(M)] & 128)
        if count_cycles==1
          cycles := cycles + 6
      elseif opcode==0xde
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8) + X
        if ram[remap(M)]==0
          ram[remap(M)] := 255
        else
          ram[remap(M)]--
        Z := ram[remap(M)]
        N := (ram[remap(M)] & 128)
        if count_cycles==1
          cycles := cycles + 7
      elseif opcode==0x8e
        M := ram[remap(++PC)]
        M := M + (ram[remap(++PC)]<<8)
        ram[remap(M)] := X
        if count_cycles==1
          cycles := cycles + 4
      elseif opcode==0x0e
        M := ram[remap(++PC)]
        M := (ram[remap(++PC)]<<8)
        C := ((ram[remap(M)] & 128)>>7)
        ram[remap(M)] := ((ram[remap(M)]<<1) & 255)
        Z := ram[remap(M)]
        N := (ram[remap(M)] & 128)
        if count_cycles==1
          cycles := cycles + 6
      elseif opcode==0x4e
        M := ram[remap(++PC)]
        M := (ram[remap(++PC)]<<8)
        C := (ram[remap(M)] & 1)
        ram[remap(M)] := (ram[remap(M)]>>1)
        Z := ram[remap(M)]
        N := 0
        if count_cycles==1
          cycles := cycles + 6
      elseif opcode==0x1e
        M := ram[remap(++PC)]
        M := (ram[remap(++PC)]<<8) + X
        C := ((ram[remap(M)] & 128)>>7)
        ram[remap(M)] := ((ram[remap(M)]<<1) & 255)
        Z := ram[remap(M)]
        N := (ram[remap(M)] & 128)
        if count_cycles==1
          cycles := cycles + 7
      elseif opcode==0x5e
        M := ram[remap(++PC)]
        M := (ram[remap(++PC)]<<8) + X
        C := (ram[remap(M)] & 1)
        ram[remap(M)] := (ram[remap(M)]>>1)
        Z := ram[remap(M)]
        N := 0
        if count_cycles==1
          cycles := cycles + 7
      elseif opcode==0x2e
        M := (++PC)
        M := M + ((++PC)<<8)
        temp := (ram[remap(M)] & 1)
        ram[remap(M)] := ((ram[remap(M)]>>1) + (C<<7))
        C := temp
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 6
      elseif opcode==0x6e
        M := (++PC)
        M := M + ((++PC)<<8)
        temp := (ram[remap(M)] & 128)
        ram[remap(M)] := ((ram[remap(M)]<<1) + C)
        C := (temp>>7)
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 6
      elseif opcode==0x3e
        M := (++PC)
        M := M + ((++PC)<<8) + X
        temp := (ram[remap(M)] & 1)
        ram[remap(M)] := ((ram[remap(M)]>>1) + (C<<7))
        C := temp
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 7
      elseif opcode==0x7e
        M := (++PC)
        M := M + ((++PC)<<8) + X
        temp := (ram[remap(M)] & 128)
        ram[remap(M)] := ((ram[remap(M)]<<1) + C)
        C := (temp>>7)
        Z := A
        N := (A & 128)
        if count_cycles==1
          cycles := cycles + 7
      else
        illegal_instruction()
        break
    else
      illegal_instruction()
      break
    PC++
    if count_cycles==1
      cycles++